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An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm
April 30, 2024, 4:44 a.m. | Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani
cs.LG updates on arXiv.org arxiv.org
Abstract: A graph embedding is an emerging approach that can represent a graph structure with a fixed-length low-dimensional vector. node2vec is a well-known algorithm to obtain such a graph embedding by sampling neighboring nodes on a given graph with a random walk technique. However, the original node2vec algorithm typically relies on a batch training of graph structures; thus, it is not suited for applications in which the graph structure changes after the deployment. In this paper, …
abstract accelerator algorithm arxiv cs.lg embedding fpga graph however low node2vec nodes random sampling training type vector
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