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Evaluating LLMs for Hardware Design and Test
May 7, 2024, 4:43 a.m. | Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce
cs.LG updates on arXiv.org arxiv.org
Abstract: Large Language Models (LLMs) have demonstrated capabilities for producing code in Hardware Description Languages (HDLs). However, most of the focus remains on their abilities to write functional code, not test code. The hardware design process consists of both design and test, and so eschewing validation and verification leaves considerable potential benefit unexplored, given that a design and test framework may allow for progress towards full automation of the digital design pipeline. In this work, we …
abstract arxiv capabilities code cs.ai cs.ar cs.cl cs.lg cs.pl design focus functional hardware however language language models languages large language large language models llms process test type validation verification
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