FloorSet - a VLSI Floorplanning Dataset with Design Constraints of Real-World SoCs

arXiv:2405.05480v1 Announce Type: cross
Abstract: Floorplanning for systems-on-a-chip (SoCs) and its sub-systems is a crucial and non-trivial step of the physical design flow. It represents a difficult combinatorial optimization problem. A typical large scale SoC with 120 partitions generates a search-space of nearly 10E250. As novel machine learning (ML) approaches emerge to tackle such problems, there is a growing need for a modern benchmark that comprises a large training dataset and performance metrics that better reflect real-world constraints and objectives …

abstract a-chip arxiv chip constraints cs.ai cs.ar cs.lg dataset design flow machine machine learning novel optimization scale search soc space systems type world