PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC

arXiv:2404.19354v1 Announce Type: cross
Abstract: This paper tackles the challenges of implementing few-shot learning on embedded systems, specifically FPGA SoCs, a vital approach for adapting to diverse classification tasks, especially when the costs of data acquisition or labeling prove to be prohibitively high. Our contributions encompass the development of an end-to-end open-source pipeline for a few-shot learning platform for object classification on a FPGA SoCs. The pipeline is built on top of the Tensil open-source framework, facilitating the design, training, …

abstract acquisition arxiv challenges classification costs cs.ar cs.lg data deployment development diverse embedded few-shot few-shot learning fpga labeling paper pipeline prove soc systems tasks type vital