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Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
Feb. 26, 2024, 5:43 a.m. | Jonas Ney, Patrick Matalla, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn
cs.LG updates on arXiv.org arxiv.org
Abstract: In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system.
abstract amplitude ann array artificial arxiv communication communications cs.lg eess.sp equalization fpga gate network neural network optical real-time type work
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