A Lightweight Inception Boosted U-Net Neural Network for Routability Prediction

arXiv:2402.10937v1 Announce Type: cross
Abstract: As the modern CPU, GPU, and NPU chip design complexity and transistor counts keep increasing, and with the relentless shrinking of semiconductor technology nodes to nearly 1 nanometer, the placement and routing have gradually become the two most pivotal processes in modern very-large-scale-integrated (VLSI) circuit back-end design. How to evaluate routability efficiently and accurately in advance (at the placement and global routing stages) has grown into a crucial research area in the field of artificial …

abstract arxiv become chip chip design complexity cpu cs.ai cs.ar cs.ce cs.gt cs.lg design gpu modern network neural network nodes npu pivotal placement prediction processes routing scale semiconductor technology type