Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning. (arXiv:2202.05022v2 [cs.ET] UPDATED)

Bias-scalable analog computing is attractive for implementing machine
learning (ML) processors with distinct power-performance specifications. For
example, ML implementations for server workloads are focused on computational
throughput and faster training, whereas ML implementations for edge devices are
focused on energy-efficient inference. In this paper, we demonstrate the
implementation of bias-scalable analog computing circuits using a
generalization of the Margin Propagation (MP) principle called shape-based
analog computing (S-AC). The resulting S-AC core integrates several near-memory
compute elements, which include: (a) non-linear …

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