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FPGA Divide-and-Conquer Placement using Deep Reinforcement Learning
April 23, 2024, 4:42 a.m. | Shang Wang, Deepak Ranganatha Sastry Mamillapalli, Tianpei Yang, Matthew E. Taylor
cs.LG updates on arXiv.org arxiv.org
Abstract: This paper introduces the problem of learning to place logic blocks in Field-Programmable Gate Arrays (FPGAs) and a learning-based method. In contrast to previous search-based placement algorithms, we instead employ Reinforcement Learning (RL) with the goal of minimizing wirelength. In addition to our preliminary learning results, we also evaluated a novel decomposition to address the nature of large search space when placing many blocks on a chipboard. Empirical experiments evaluate the effectiveness of the learning …
abstract algorithms arrays arxiv contrast cs.ai cs.ar cs.lg fpga fpgas gate logic paper placement reinforcement reinforcement learning results search type
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