May 15, 2024, 4:43 a.m. | William A. Borders, Advait Madhavan, Matthew W. Daniels, Vasileia Georgiou, Martin Lueker-Boden, Tiffany S. Santos, Patrick M. Braganca, Mark D. Stile

cs.LG updates on arXiv.org arxiv.org

arXiv:2312.06446v2 Announce Type: replace-cross
Abstract: The increasing scale of neural networks needed to support more complex applications has led to an increasing requirement for area- and energy-efficient hardware. One route to meeting the budget for these applications is to circumvent the von Neumann bottleneck by performing computation in or near memory. An inevitability of transferring neural networks onto hardware is that non-idealities such as device-to-device variations or poor device yield impact performance. Methods such as hardware-aware training, where substrate non-idealities …

abstract applications arrays arxiv budget computation cs.et cs.lg cs.ne energy hardware measurement memory near network networks network training neural networks physics.app-ph replace route scale support training type

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