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MicroNAS: Memory and Latency Constrained Hardware-Aware Neural Architecture Search for Time Series Classification on Microcontrollers
Feb. 6, 2024, 5:48 a.m. | Tobias King Yexu Zhou Tobias R\"oddiger Michael Beigl
cs.LG updates on arXiv.org arxiv.org
adapt architecture classification concept cs.lg designing development differentiable domain error gap hardware latency literature memory microcontrollers model development nas networks neural architecture search neural networks search series time series
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