End-to-end codesign of Hessian-aware quantized neural networks for FPGAs and ASICs. (arXiv:2304.06745v1 [cs.LG])

We develop an end-to-end workflow for the training and implementation of
co-designed neural networks (NNs) for efficient field-programmable gate array
(FPGA) and application-specific integrated circuit (ASIC) hardware. Our
approach leverages Hessian-aware quantization (HAWQ) of NNs, the Quantized Open
Neural Network Exchange (QONNX) intermediate representation, and the hls4ml
tool flow for transpiling NNs into FPGA and ASIC firmware. This makes efficient
NN implementations in hardware accessible to nonexperts, in a single
open-sourced workflow that can be deployed for real-time machine learning …

application applications arxiv field-programmable gate array flow fpga hardware implementation intermediate machine machine learning machine learning applications network networks neural network neural networks nns quantization real-time real-time machine learning representation tool training workflow