HDLdebugger: Streamlining HDL debugging with Large Language Models

arXiv:2403.11671v1 Announce Type: cross
Abstract: In the domain of chip design, Hardware Description Languages (HDLs) play a pivotal role. However, due to the complex syntax of HDLs and the limited availability of online resources, debugging HDL codes remains a difficult and time-intensive task, even for seasoned engineers. Consequently, there is a pressing need to develop automated HDL code debugging models, which can alleviate the burden on hardware engineers. Despite the strong capabilities of Large Language Models (LLMs) in generating, completing, …

abstract arxiv availability chip chip design cs.ai cs.ar cs.ce cs.lg cs.se debugging design domain engineers hardware however language language models languages large language large language models pivotal resources role syntax type