Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators. (arXiv:2207.00068v1 [cs.CV])

This paper introduces the sparse periodic systolic (SPS) dataflow, which
advances the state-of-the-art hardware accelerator for supporting lightweight
neural networks. Specifically, the SPS dataflow enables a novel hardware design
approach unlocked by an emergent pruning scheme, periodic pattern-based
sparsity (PPS). By exploiting the regularity of PPS, our sparsity-aware
compiler optimally reorders the weights and uses a simple indexing unit in
hardware to create matches between the weights and activations. Through the
compiler-hardware codesign, SPS dataflow enjoys higher degrees of parallelism …

arxiv convolutional neural network cv dataflow network neural network power